1. Field of the Invention
The invention relates to SOI structures (silicon on insulator), in which electrical connections are provided between device structures in the upper semiconductor layer insulated from the substrate and the semiconductor substrate, which connections are formed through the insulating layer to the upper semiconductor layer.
2. Discussion of Background Information
An SOI structure consists of a thin semiconductor layer, which is located on a thin oxide layer. The oxide layer is typically formed as a buried oxide (BOX) and is also provided on a semiconductor layer, i.e., generally a silicon layer, that is, the silicon substrate, which usually has a thickness of 300 μm to 800 μm. This substrate serves the purpose of handling the structure. The actual device functions are realized in the semiconductor layer near the surface, similar to usual CMOS processes performed on homogenous silicon wafers.
A significant difference with respect to standard CMOS processes resides in the fact that the devices are dielectrically separated from each other by trenches which extend down to the insulating layer. Hereby, a mutual electrical interaction of the devices is significantly reduced. This dielectric isolation renders the SOI technology also suitable for high voltage applications.
On one hand, it is advantageous when the devices are not coupled to each other via the substrate. Thus, certain non-desired substrate effects may be avoided, such as latch-up, significant reverse currents at elevated temperatures, increased parasitic capacitances at the source/bulk or drain/bulk-pn junctions.
On the other hand, it is advantageous when a substrate connection is provided, for instance, to allow to incorporate into the circuit certain active or passive structures formed in the substrate. In this way, devices may also be integrated that are formed by different techniques not corresponding to the SOI technology. In this case, an electric contact to the substrate would be advantageous. The back side metallization of the substrate, which would be useable for this purpose is, however, not a component of the SOI technology. The corresponding packages do not provide a back side contact and, frequently, the number of pins is not sufficient in the integrated circuits so as to allow a contact to the back side or to root out such a contact.